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ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 7 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
GRAPHITE
2004
ACM
14 years 22 days ago
A new fractal-based approach for 3D visualization of mountains in VRML standard
Several factors currently limit the size of Virtual Reality Modeling Language (VRML) models that can be effectively visualized over the Web. Main factors include network bandwidth...
Mohsen Sharifi, Fatemeh Hashemi Golpaygani, Mehdi ...
EOR
2008
103views more  EOR 2008»
13 years 7 months ago
New complexity analysis of IIPMs for linear optimization based on a specific self-regular function
Primal-dual Interior-Point Methods (IPMs) have shown their ability in solving large classes of optimization problems efficiently. Feasible IPMs require a strictly feasible startin...
Maziar Salahi, M. Reza Peyghami, Tamás Terl...
TOOLS
2000
IEEE
13 years 11 months ago
Testing-for-Trust: The Genetic Selection Model Applied to Component Qualification
This paper presents a method and a tool for building trustable OO components. The methodology is based on an integrated design and test approach for OO software components. It is ...
Benoit Baudry, Vu Le Hanh, Yves Le Traon
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
14 years 16 days ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar