Algorithms and Tools for Network on Chip Based System Design

Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Genetic Algorithm and the correlated software is described for mapping concurrent applications on a fixed NoC architecture. Concurrent applications are represented by a parameterized multitask-graph and the fixed target NoC architecture uses a two dimensional mesh of switches as a communication backbone and populated with a known set of IP cores as computational resources. The algorithm proposes mathematical delay models and finds a good method of mapping vertices of the multi-task-graph to available cores so that every single task graph can meet its respective deadline. The correlated software has two separate tools. The first tool is used to configure the required NoC backbone and generate multi-task-graph for testing purose. The othertool implements Two-Step Genetic Algorithm and can give the design result wit...

• Type: Conference
• Year: 2003
• Where: SBCCI
• Authors: Tang Lei, Shashi Kumar
• Keywords: Fixed Noc Architecture, Noc Architecture, SBCCI 2003, Two-Step Genetic Algorithm