76 search results - page 15 / 16 » An Elementary Processor Architecture with Simultaneous Instr... |
POPL
2003
ACM
14 years 7 months ago
2003
ACM
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
CGO
2003
IEEE
14 years 23 days ago
2003
IEEE
Predicated execution can eliminate hard to predict branches and help to enable instruction level parallelism. Many current predication variants exist where the result update is co...
ISPDC
2010
IEEE
13 years 6 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
EGH
2010
Springer
13 years 5 months ago
2010
Springer
While a number of different shading languages have been developed, their efficient integration into an existing renderer is notoriously difficult, often boiling down to implementi...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Incorrect thread synchronization often leads to concurrency bugs that manifest nondeterministically and are difficult to detect and fix. Past work on detecting concurrency bugs ...