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VLSID
2002
IEEE
119views VLSI» more  VLSID 2002»
14 years 7 months ago
Reducing Library Development Cycle Time through an Optimum Layout Create Flow
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
Rituparna Mandal, Dibyendu Goswami, Arup Dash
ICSE
2008
IEEE-ACM
14 years 7 months ago
CCVisu: automatic visual software decomposition
Understanding the structure of large existing (and evolving) software systems is a major challenge for software engineers. In reverse engineering, we aim to compute, for a given s...
Dirk Beyer
ICIW
2009
IEEE
14 years 2 months ago
Personalized News Search in WWW: Adapting on User's Behavior
— Personalized Web Search becomes nowadays a promising option in the field of Information Retrieval and search engines design by improving both output quality and user experience...
Christos Bouras, Vassilis Poulopoulos, Panagiotis ...
ECRTS
2007
IEEE
14 years 1 months ago
WCET-Directed Dynamic Scratchpad Memory Allocation of Data
Many embedded systems feature processors coupled with a small and fast scratchpad memory. To the difference with caches, allocation of data to scratchpad memory must be handled by...
Jean-François Deverge, Isabelle Puaut
GLOBECOM
2007
IEEE
14 years 1 months ago
Joint Reduction of Peak-to-Average Power Ratio and Out-of-Band Power in OFDM Systems
—The high peak-to-average power ratio is a major drawback of OFDM systems. Many PAPR reduction techniques have been proposed in the literature, among them a method that uses a su...
Martin Senst, Markus Jordan, Meik Dorpinghaus, Mic...