76 search results - page 10 / 16 » An Estimation Methodology for Designing Instruction Cache Me... |
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Software energy estimation is a critical step in the design of energyefficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slo...
SASP
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...