76 search results - page 14 / 16 » An Estimation Methodology for Designing Instruction Cache Me... |
TCAD
2002
13 years 7 months ago
2002
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
EMSOFT
2009
Springer
14 years 2 months ago
2009
Springer
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages of scratchpads include reduced energy consumption in comparison to a cache and a...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...