Recent work in low-latency, high-bandwidth communication systems has resulted in building user–level Network InControllers (NICs) and communication abstractions that support dir...
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
Abstract—We consider an interference-limited wireless network, where multiple source-destination pairs compete for the same pool of relay nodes. In an attempt to maximize the sum...
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
— Scientific applications often perform complex computational analyses that consume and produce large data sets. We are concerned with data placement policies that distribute dat...
Ann L. Chervenak, Ewa Deelman, Miron Livny, Mei-Hu...