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IEEEPACT
2002
IEEE
14 years 14 days ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung
IJAIT
2008
99views more  IJAIT 2008»
13 years 7 months ago
Optimal Basic Block Instruction Scheduling for Multiple-Issue Processors Using Constraint Programming
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction sch...
Abid M. Malik, Jim McInnes, Peter van Beek
PPOPP
2005
ACM
14 years 1 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
TPDS
1998
64views more  TPDS 1998»
13 years 7 months ago
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
Steven Wallace, Nader Bagherzadeh
CGO
2011
IEEE
12 years 11 months ago
Language and compiler support for auto-tuning variable-accuracy algorithms
—Approximating ideal program outputs is a common technique for solving computationally difficult problems, for adhering to processing or timing constraints, and for performance ...
Jason Ansel, Yee Lok Wong, Cy P. Chan, Marek Olsze...