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HYBRID
2010
Springer
14 years 23 days ago
Safe compositional network sketches: formal framework
NetSketch is a tool for the specification of constrained-flow applications and the certification of desirable safety properties imposed thereon. NetSketch assists system integr...
Azer Bestavros, Assaf J. Kfoury, Andrei Lapets, Mi...
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 22 days ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
SYSTOR
2010
ACM
14 years 14 days ago
On the DMA mapping problem in direct device assignment
I/O intensive workloads running in virtual machines can suffer massive performance degradation. Direct assignment of I/O devices to virtual machines is the best performing I/O vir...
Ben-Ami Yassour, Muli Ben-Yehuda, Orit Wasserman
FPL
2009
Springer
117views Hardware» more  FPL 2009»
14 years 8 days ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
LCPC
2009
Springer
14 years 6 days ago
Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops
This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
Mounira Bachir, David Gregg, Sid Ahmed Ali Touati