608 search results - page 66 / 122 » An Experimental Validation of the PRO Model for Parallel and... |
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
Modeling communications in wireless networks is a challenging task since it asks for a simple mathematical object on which efficient algorithms can be designed, but that must also...
HCW
1999
IEEE
13 years 12 months ago
1999
IEEE
: Networks of Workstations (NOW) have become an attractive alternative platform for high performance computing. Due to the commodity nature of workstations and interconnects and du...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
“Is transactional memory useful?” is the question that cannot be answered until we provide substantial applications that can evaluate its capabilities. While existing TM appli...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Parallel I/O needs to keep pace with the demand of high performance computing applications on systems with ever-increasing speed. Exploiting high-end interconnect technologies to ...