Sciweavers

260 search results - page 5 / 52
» An FPGA Implemented Processor Architecture with Adaptive Res...
Sort
View
JSA
2010
158views more  JSA 2010»
13 years 1 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
IPPS
2006
IEEE
14 years 1 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
ACMSE
2011
ACM
12 years 7 months ago
Targeting FPGA-based processors for an implementation-driven compiler construction course
This paper describes the adaptation of a modern compiler construction course to target an FPGA-based hardware platform used throughout our computer science curriculum. One of the ...
D. Brian Larkins, William M. Jones
ISJGP
2010
13 years 4 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
FCCM
2009
IEEE
165views VLSI» more  FCCM 2009»
14 years 1 months ago
Accelerating Quadrature Methods for Option Valuation
This paper presents an architecture for FPGA acceleration of quadrature methods used for pricing complex options, such as discrete barrier, Bermudan, and American options. The arc...
Anson H. T. Tse, David B. Thomas, Wayne Luk