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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
14 years 1 months ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong
DSN
2007
IEEE
13 years 11 months ago
Augmenting Branch Predictor to Secure Program Execution
Although there are various ways to exploit software vulnerabilities for malicious attacks, the attacks always result in unexpected behavior in program execution, deviating from wh...
Yixin Shi, Gyungho Lee
DLS
2005
176views Languages» more  DLS 2005»
13 years 9 months ago
Dynamic data polyvariance using source-tagged classes
The DDP (Demand-driven/Pruning) analysis algorithm allows us to perform data-flow analyses of programming languages that are dynamically typed and have higher-order control flow...
S. Alexander Spoon, Olin Shivers
INFOCOM
2010
IEEE
13 years 5 months ago
FlashTrie: Hash-based Prefix-Compressed Trie for IP Route Lookup Beyond 100Gbps
It is becoming apparent that the next generation IP route lookup architecture needs to achieve speeds of 100Gbps and beyond while supporting both IPv4 and IPv6 with fast real-time ...
Masanori Bando, H. Jonathan Chao