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ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
16 years 7 days ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
UIST
2006
ACM
16 years 4 days ago
In-stroke word completion
We present the design and implementation of a word-level stroking system called Fisch, which is intended to improve the speed of character-level unistrokes. Importantly, Fisch doe...
Jacob O. Wobbrock, Brad A. Myers, Duen Horng Chau
AICCSA
2005
IEEE
124views Hardware» more  AICCSA 2005»
15 years 12 months ago
On multicast scheduling and routing in multistage Clos networks
Multicast communication, which involves transmitting information from one node to multiple nodes, is a vital operation in both broadband integrated services digital networks (BISD...
Bin Tang
CCGRID
2005
IEEE
15 years 12 months ago
GangSim: a simulator for grid scheduling studies
Large distributed Grid systems pose new challenges in job scheduling due to complex workload characteristics and system characteristics. Due to the numerous parameters that must b...
Catalin Dumitrescu, Ian T. Foster
ICDE
2005
IEEE
176views Database» more  ICDE 2005»
15 years 11 months ago
LAPIN-SPAM: An Improved Algorithm for Mining Sequential Pattern
Sequence pattern mining is an important research problem because it is the basis of many other applications. Yet how to efficiently implement the mining is difficult due to the ...
Zhenglu Yang, Masaru Kitsuregawa