Sciweavers

1079 search results - page 14 / 216
» An Implementation of an Address Generator Using Hash Memorie...
Sort
View
ANCS
2005
ACM
14 years 2 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...
ISW
2000
Springer
14 years 17 days ago
Weighted One-Way Hash Chain and Its Applications
An one-way hash chain generated by the iterative use of a one-way hash function on a secret value has recently been widely employed to develop many practical cryptographic solution...
Sung-Ming Yen, Yuliang Zheng
PPOPP
2003
ACM
14 years 2 months ago
Using generative design patterns to generate parallel code for a distributed memory environment
A design pattern is a mechanism for encapsulating the knowledge of experienced designers into a re-usable artifact. Parallel design patterns reflect commonly occurring parallel co...
Kai Tan, Duane Szafron, Jonathan Schaeffer, John A...
CAV
2004
Springer
154views Hardware» more  CAV 2004»
14 years 22 days ago
Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qa...
HPCA
1997
IEEE
14 years 1 months ago
Software-Managed Address Translation
In this paper we explore software-managed address translation. The purpose of the study is to specify the memory management design for a high clock-rate PowerPC implementation in ...
Bruce L. Jacob, Trevor N. Mudge