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MICRO
2006
IEEE
89views Hardware» more  MICRO 2006»
14 years 3 months ago
DMDC: Delayed Memory Dependence Checking through Age-Based Filtering
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
Fernando Castro, Luis Piñuel, Daniel Chaver...
ASPLOS
2011
ACM
13 years 19 days ago
NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laur...
SPIRE
2005
Springer
14 years 2 months ago
Faster Generation of Super Condensed Neighbourhoods Using Finite Automata
We present a new algorithm for generating super condensed neighbourhoods. Super condensed neighbourhoods have recently been presented as the minimal set of words that represent a p...
Luís M. S. Russo, Arlindo L. Oliveira
GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
14 years 3 months ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
INFOCOM
2009
IEEE
14 years 3 months ago
Scalar Prefix Search: A New Route Lookup Algorithm for Next Generation Internet
Currently, the increasing rate of routing lookups in Internet routers, the large number of prefixes and also the transition from IPV4 to IPV6, have caused Internet designers to pro...
Mohammad Behdadfar, Hossein Saidi, Hamid Alaei, Ba...