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CASES
2005
ACM
13 years 9 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne
CODES
2007
IEEE
14 years 2 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
RTSS
2000
IEEE
14 years 2 days ago
Enhanced Fixed-Priority Scheduling with (m, k)-Firm Guarantee
In this paper, we study the problem of scheduling task sets with (m,k) constraints. In our approach, jobs of each task are partitioned into two sets: mandatory and optional. Manda...
Gang Quan, Xiaobo Sharon Hu
ISCA
2002
IEEE
68views Hardware» more  ISCA 2002»
14 years 19 days ago
Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior
Techniques for analyzing and improving memory referencing behavior continue to be important for achieving good overall program performance due to the ever-increasing performance g...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
VTC
2008
IEEE
142views Communications» more  VTC 2008»
14 years 2 months ago
Fairness Assessment of the Adaptive Token Bank Fair Queuing Scheduling Algorithm
Abstract—Adaptive Token Bank Fair Queuing (ATBFQ) algorithm has been proposed as a cross-layer scheduling technique for 4G wireless systems recently. This algorithm takes higher ...
Feroz A. Bokhari, Halim Yanikomeroglu, William K. ...