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ET
2002
85views more  ET 2002»
15 years 3 months ago
Signal Integrity: Fault Modeling and Testing in High-Speed SoCs
As we approach 100nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-onchips. Voltage distortion (noise) and delay viol...
Mehrdad Nourani, Amir Attarha
GECCO
2006
Springer
253views Optimization» more  GECCO 2006»
15 years 7 months ago
A novel approach to optimize clone refactoring activity
Achieving a high quality and cost-effective tests is a major concern for software buyers and sellers. Using tools and integrating techniques to carry out low cost testing are chal...
Salah Bouktif, Giuliano Antoniol, Ettore Merlo, Ma...
CORR
2008
Springer
92views Education» more  CORR 2008»
15 years 3 months ago
Interconnect Challenges in Highly Integrated MEMS/ASIC Subsystems
Micromechanical devices like accelerometers or rotation sensors form an increasing segment beneath the devices supplying the consumer market. A hybrid integration approach to buil...
N. Marenco, S. Warnat, W. Reinert
132
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HASE
1997
IEEE
15 years 8 months ago
High-Coverage Fault Tolerance in Real-Time Systems Based on Point-to-Point Communication
: The distributed recovery block (DRB) scheme is a widely applicable approach for realizing both hardware and software fault tolerance in real-time distributed and parallel compute...
K. H. Kim, Chittur Subbaraman, Eltefaat Shokri
ISSS
1998
IEEE
107views Hardware» more  ISSS 1998»
15 years 8 months ago
Integrating Communication Protocol Selection with Partitioning in Hardware/Software Codesign
This paper presents a codesign approach which incorporates communication protocol selection as a design parameter within hardware/software partitioning. The presented approach tak...
Peter Voigt Knudsen, Jan Madsen