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APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
CASES
2006
ACM
14 years 1 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
INTEGRATION
2007
90views more  INTEGRATION 2007»
13 years 7 months ago
Partitioning-based decoupling capacitor budgeting via sequence of linear programming
In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linear p...
Jeffrey Fan, Sheldon X.-D. Tan, Yici Cai, Xianlong...
IPPS
2009
IEEE
14 years 2 months ago
Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
ATMOS
2007
163views Optimization» more  ATMOS 2007»
13 years 9 months ago
Branching Strategies to Improve Regularity of Crew Schedules in Ex-Urban Public Transit
We discuss timetables in ex-urban bus traffic that consist of many trips serviced every day together with some exceptions that do not repeat daily. Traditional optimization methods...
Ingmar Steinzen, Leena Suhl, Natalia Kliewer