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» An OR Parallel Prolog Model for Distributed Memory Systems
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HPCA
1999
IEEE
13 years 12 months ago
Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...
Murthy Durbhakula, Vijay S. Pai, Sarita V. Adve
HPCC
2005
Springer
14 years 1 months ago
Transactional Cluster Computing
A lot of sophisticated techniques and platforms have been proposed to build distributed object systems. Remote method invocation and explicit message passing on top of traditional...
Stefan Frenz, Michael Schöttner, Ralph Gö...
VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
14 years 8 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
ISPAN
1997
IEEE
13 years 11 months ago
CASS: an efficient task management system for distributed memory architectures
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
Jing-Chiou Liou, Michael A. Palis
PPAM
2005
Springer
14 years 1 months ago
Checkpointing Speculative Distributed Shared Memory
This paper describes a checkpointing mechanism destined for Distributed Shared Memory (DSM) systems with speculative prefetching. Speculation is a general technique involving predi...
Arkadiusz Danilecki, Anna Kobusinska, Michal Szych...