258 search results - page 24 / 52 » An Optical Simulation of Shared Memory |
ISCA
1994
IEEE
14 years 3 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
ICS
2010
Tsinghua U.
14 years 2 months ago
2010
Tsinghua U.
: Perhaps the two most significant theoretical questions about the programming of self-assembling agents are: (1) necessary and sufficient conditions to produce a unique terminal a...
CF
2009
ACM
14 years 5 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
CODES
2007
IEEE
14 years 5 months ago
2007
IEEE
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
HPCC
2009
Springer
14 years 2 months ago
2009
Springer
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...