It is advantageous to perform compiler optimizations to lower the WCET of a task since tasks with lower WCETs are easier to schedule and more likely to meet their deadlines. Compi...
Wankang Zhao, William C. Kreahling, David B. Whall...
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...
Middleware is often built using a layered architectural style. Layered design provides good separation of the different concerns of middleware, such as communication, marshaling, ...
We present the first hardware-in-the-loop evolutionary optimization on an ornithopter. Our experiments demonstrate the feasibility of evolving flight through genetic algorithms an...
While the fault repair capability of Evolvable Hardware (EH) approaches have been previously demonstrated, further improvements to fault handling capability can be achieved by exp...