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ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 5 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
13 years 11 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
DFG
2004
Springer
13 years 10 months ago
Verification of PLC Programs Given as Sequential Function Charts
Programmable Logic Controllers (PLC) are widespread in the manufacturing and processing industries to realize sequential procedures and to avoid safety-critical states. For the spe...
Nanette Bauer, Sebastian Engell, Ralf Huuck, Sven ...
PTS
2008
165views Hardware» more  PTS 2008»
13 years 8 months ago
Test Plan Generation for Concurrent Real-Time Systems Based on Zone Coverage Analysis
The state space explosion due to concurrency and timing constraints of concurrent real-time systems (CRTS) presents significant challenges to the verification engineers. In this pa...
Farn Wang, Geng-Dian Huang
ENTCS
2008
132views more  ENTCS 2008»
13 years 7 months ago
Distributed Verification of Multi-threaded C++ Programs
Verification of multi-threaded C++ programs poses three major challenges: the large number of states, states with huge sizes, and time intensive expansions of states. This paper p...
Stefan Edelkamp, Shahid Jabbar, Damian Sulewski