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MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
13 years 11 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
IJISEC
2006
106views more  IJISEC 2006»
13 years 7 months ago
Execution transactions for defending against software failures: use and evaluation
We examine the problem of containing buffer overflow attacks in a safe and efficient manner. Briefly, we automatically augment source code to dynamically catch stack and heap-based...
Stelios Sidiroglou, Angelos D. Keromytis
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 5 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
SIGMOD
2009
ACM
136views Database» more  SIGMOD 2009»
14 years 7 months ago
A comparison of approaches to large-scale data analysis
There is currently considerable enthusiasm around the MapReduce (MR) paradigm for large-scale data analysis [17]. Although the basic control flow of this framework has existed in ...
Andrew Pavlo, Erik Paulson, Alexander Rasin, Danie...
CVPR
2006
IEEE
14 years 9 months ago
Shape from Shading: Recognizing the Mountains through a Global View
Resolving local ambiguities is an important issue for shape from shading (SFS). Pixel ambiguities of SFS can be eliminated by propagation approaches. However, patch ambiguities st...
Qihui Zhu, Jianbo Shi