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» An approach to benchmarking configuration complexity
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DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 3 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
CGO
2007
IEEE
14 years 3 months ago
Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time
Emerging microprocessors offer unprecedented parallel computing capabilities and deeper memory hierarchies, increasing the importance of loop transformations in optimizing compile...
Louis-Noël Pouchet, Cédric Bastoul, Al...
CC
2007
Springer
14 years 3 months ago
Correcting the Dynamic Call Graph Using Control-Flow Constraints
Abstract. To reason about programs, dynamic optimizers and analysis tools use sampling to collect a dynamic call graph (DCG). However, sampling has not achieved high accuracy with ...
Byeongcheol Lee, Kevin Resnick, Michael D. Bond, K...
ICANN
2007
Springer
14 years 3 months ago
Selection of Decision Stumps in Bagging Ensembles
Abstract. This article presents a comprehensive study of different ensemble pruning techniques applied to a bagging ensemble composed of decision stumps. Six different ensemble p...
Gonzalo Martínez-Muñoz, Daniel Hern&...
MIDDLEWARE
2007
Springer
14 years 3 months ago
Garbage Collecting the Grid: A Complete DGC for Activities
Abstract. Grids are becoming more and more dynamic, running parallel applications on large scale and heterogeneous resources. Explicitly stopping a whole distributed application is...
Denis Caromel, Guillaume Chazarain, Ludovic Henrio