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» An architectural exploration of via patterned gate arrays
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FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
13 years 11 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
FCCM
2003
IEEE
96views VLSI» more  FCCM 2003»
14 years 23 days ago
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
Pedro C. Diniz, Joonseok Park
FPL
1995
Springer
106views Hardware» more  FPL 1995»
13 years 11 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
IPPS
2010
IEEE
13 years 5 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
PVLDB
2010
166views more  PVLDB 2010»
13 years 5 months ago
Complex Event Detection at Wire Speed with FPGAs
Complex event detection is an advanced form of data stream processing where the stream(s) are scrutinized to identify given event patterns. The challenge for many complex event pr...
Louis Woods, Jens Teubner, Gustavo Alonso