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MICRO
2010
IEEE
128views Hardware» more  MICRO 2010»
13 years 6 months ago
Adaptive and Speculative Slack Simulations of CMPs on CMPs
Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, ...
IPPS
1998
IEEE
14 years 23 days ago
Rendering Computer Animations on a Network of Workstations
Rendering high-quality computer animations requires intensive computation, and therefore a large amount of time. One way to speed up this process is to devise rendering algorithms...
Timothy D. Davis, Edward W. Davis
HPCA
2008
IEEE
14 years 8 months ago
Serializing instructions in system-intensive workloads: Amdahl's Law strikes again
Serializing instructions (SIs), such as writes to control registers, have many complex dependencies, and are difficult to execute out-of-order (OoO). To avoid unnecessary complexi...
Philip M. Wells, Gurindar S. Sohi
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 3 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
PDPTA
1996
13 years 9 months ago
Stereo Vision and 3D Reconstruction on a Distributed Memory System
An important research topic in image processing is stereo vision. The objective is to compute a 3-dimensional representation of some scenery from two 2-dimensional digital images....
N. H. L. Kuijpers, G. Paar, Johan J. Lukkien