Sciweavers

290 search results - page 27 / 58
» An embedded language approach to teaching hardware compilati...
Sort
View
VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Energy savings through embedded processing on disk system
Abstract— Many of today’s data-intensive applications manipulate disk-resident data sets. As a result, their overall behavior is tightly coupled with their disk performance. Un...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, F...
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
14 years 2 months ago
Automated synthesis of streaming C applications to process networks in hardware
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
Sven van Haastregt, Bart Kienhuis
ICSEA
2006
IEEE
14 years 1 months ago
Template-Based Development of Fault-Tolerant Embedded Software
— Currently there are different approaches to develop fault-tolerant embedded software: implementing the system from scratch or using libraries respectively specialized hardware....
Christian Buckl, Alois Knoll, Gerhard Schrott
CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava