139 search results - page 7 / 28 » An evolutionary algorithm for reducing integrated-circuit te... |
EH
2000
IEEE
13 years 12 months ago
2000
IEEE
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
GLVLSI
2002
IEEE
14 years 15 days ago
2002
IEEE
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
PAMI
2000
13 years 7 months ago
2000
Abstract-- This paper introduces Evolutionary Pursuit (EP) as a novel and adaptive representation method for image encoding and classification. In analogy to projection pursuit met...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
FPGA
2009
ACM
14 years 2 months ago
2009
ACM
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...