The paper presents a survey of the VSE system, a kind of CASE-tool for formal software development. It is a summary of a tutorial presentation describing methodology, formalisms, ...
One of the advantages of temporal-logic model-checking tools is their ability to accompany a negative answer to the correctness query by a counterexample to the satisfaction of the...
Compared are different methods for evaluation of formulas expressing microprocessor correctness in the logic of Equality with Uninterpreted Functions and Memories (EUFM) by transl...
As online businesses keep growing and Web services become pervasive, there is an increasing demand for micropayment protocols that facilitate microcommerce, namely selling content...
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (ContPNs). Specifically, we consider two problems: (1) given an initial set ...
Marius Kloetzer, Cristian Mahulea, Calin Belta, Ma...