Sciweavers

2488 search results - page 3 / 498
» An improvement in formal verification
Sort
View
CII
2006
67views more  CII 2006»
13 years 9 months ago
A formal verification framework and associated tools for Enterprise Modeling: Application to UEML
The aim of this paper is to propose and apply a verification and validation approach to Enterprise Modeling that enables the user to improve the relevance and correctness, the sui...
Vincent Chapurlat, Bernard Kamsu Foguem, Fran&cced...
FMICS
2010
Springer
13 years 11 months ago
SMT-Based Formal Verification of a TTEthernet Synchronization Function
Abstract. TTEthernet is a communication infrastructure for mixedcriticality systems that integrates dataflow from applications with different criticality levels on a single network...
Wilfried Steiner, Bruno Dutertre
TDSC
2008
152views more  TDSC 2008»
13 years 9 months ago
Towards Formal Verification of Role-Based Access Control Policies
Specifying and managing access control policies is a challenging problem. We propose to develop formal verification techniques for access control policies to improve the current s...
Somesh Jha, Ninghui Li, Mahesh V. Tripunitara, Qih...
CAV
1994
Springer
111views Hardware» more  CAV 1994»
14 years 1 months ago
Automatic Verification of Timed Circuits
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
Tomas Rokicki, Chris J. Myers
DAC
2006
ACM
14 years 10 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu