2488 search results - page 4 / 498 » An improvement in formal verification |
FCSC
2010
13 years 7 months ago
2010
Abstract Read-write locking is an important mechanism to improve concurrent granularity, but it is difficult to reason about the safety of concurrent programs with read-write locks...
ICCAD
2009
IEEE
13 years 7 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
DAC
2009
ACM
14 years 10 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
VLSID
2008
IEEE
14 years 10 months ago
2008
IEEE
This paper demonstrates a formal verificationplanning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC o...
ACSW
2006
13 years 11 months ago
2006
Formal specification and verification of protocols have been credited for uncovering protocol flaws; revealing inadequacies in protocol design of the Initial Stage and Negotiation...