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» An improvement in formal verification
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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
14 years 2 months ago
A process algebra interpretation of a verification oriented overlanguage of VHDL
The VOVHDL language was defined as a verification oriented VHDL
Catherine Bayol, Bernard Soulas, Dominique Borrion...
IPL
2006
118views more  IPL 2006»
13 years 10 months ago
Easy intruder deduction problems with homomorphisms
We present complexity results for the verification of security protocols. Since the perfect cryptography assumption is unrealistic for cryptographic primitives with visible algebr...
Stéphanie Delaune
COMPSAC
2007
IEEE
14 years 4 months ago
Specifying Pointcuts in AspectJ
Program verification is a promising approach to improving program quality. To formally verify aspectoriented programs, we have to find a way to formally specify programs written i...
Yi Wang, Jianjun Zhao
POPL
2006
ACM
14 years 10 months ago
Formal certification of a compiler back-end or: programming a compiler with a proof assistant
This paper reports on the development and formal certification (proof of semantic preservation) of a compiler from Cminor (a Clike imperative language) to PowerPC assembly code, u...
Xavier Leroy
CCECE
2006
IEEE
14 years 4 months ago
A Formal CSP Framework for Message-Passing HPC Programming
To help programmers of high-performance computing (HPC) systems avoid communication-related errors, we employ a formal process algebra, Communicating Sequential Processes (CSP), w...
John D. Carter, William B. Gardner