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» An industrial application of symbolic model checking
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IFIP
2001
Springer
14 years 2 days ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
DFG
2004
Springer
13 years 11 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...
CSFW
2009
IEEE
14 years 2 months ago
ASPIER: An Automated Framework for Verifying Security Protocol Implementations
Abstract. We present aspier – the first framework that combines software model checking with a standard protocol security model to analyze authentication and secrecy properties ...
Sagar Chaki, Anupam Datta
ENTCS
2007
105views more  ENTCS 2007»
13 years 7 months ago
Narrowing and Rewriting Logic: from Foundations to Applications
Narrowing was originally introduced to solve equational E-unification problems. It has also been recognized as a key mechanism to unify functional and logic programming. In both ...
Santiago Escobar, José Meseguer, Prasanna T...
CHARME
2003
Springer
73views Hardware» more  CHARME 2003»
13 years 11 months ago
Towards Diagrammability and Efficiency in Event Sequence Languages
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
Kathi Fisler