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CCECE
2006
IEEE
14 years 2 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
NSDI
2004
13 years 10 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
14 years 5 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
EAAI
2007
199views more  EAAI 2007»
13 years 8 months ago
Nonlinear system modeling and robust predictive control based on RBF-ARX model
An integrated modeling and robust model predictive control (MPC) approach is proposed for a class of nonlinear systems with unknown steady state. First, the nonlinear system is id...
Hui Peng, Zi-Jiang Yang, Weihua Gui, Min Wu, Hideo...
BMCBI
2004
185views more  BMCBI 2004»
13 years 8 months ago
Linear fuzzy gene network models obtained from microarray data by exhaustive search
Background: Recent technological advances in high-throughput data collection allow for experimental study of increasingly complex systems on the scale of the whole cellular genome...
Bahrad A. Sokhansanj, J. Patrick Fitch, Judy N. Qu...