As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
We believe that navigation in information spaces is best supported by tapping into our natural spatial and geographic ways of thinking. To this end, we are developing a new comput...
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
End-to-end available bandwidth estimation between Internet hosts is important to understand network congestion and enhance the performance of Quality-of-Service (QoS) demanding ap...
This paper explores the model of providing a common overlay structure management layer to assist the construction of large-scale wide-area Internet services. To this end, we propo...