In future large-scale multi-core microprocessors, hard errors and process variations will create dynamic heterogeneity, causing performance and power characteristics to differ amo...
Many computational solutions can be expressed as directed acyclic graphs (DAGs) with weighted nodes. In parallel computing, scheduling such DAGs onto manycore processors remains a ...
We observe two deficiencies of current query processing and scheduling techniques for sensor networks: (1) A query execution plan does not adapt to the hardware characteristics o...
We consider a resource synthesis technique for realtime systems where dynamic voltage scaling is supported, the energy budget is limited, and the performance of the system depends...
Dong-In Kang, Stephen P. Crago, Jinwoo Suh, Janice...
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...
Eric A. Brewer, Paul Gauthier, Armando Fox, Angela...