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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 16 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
ENTCS
2010
102views more  ENTCS 2010»
13 years 2 months ago
Test Case Generation for Adequacy of Floating-point to Fixed-point Conversion
Porting an application written for personal computer to embedded devices requires conversion of floating-point numbers and operations into fixed-point ones. Testing the conversion...
Tuan-Hung Pham, Anh-Hoang Truong, Wei-Ngan Chin, T...
DAC
2005
ACM
13 years 9 months ago
Smart diagnostics for configurable processor verification
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
Sadik Ezer, Scott Johnson
CONCUR
2010
Springer
13 years 8 months ago
Simulation Distances
Boolean notions of correctness are formalized by preorders on systems. Quantitative measures of correctness can be formalized by realvalued distance functions between systems, wher...
Pavol Cerný, Thomas A. Henzinger, Arjun Rad...
CORR
2006
Springer
104views Education» more  CORR 2006»
13 years 7 months ago
Multigroup-Decodable STBCs from Clifford Algebras
A Space-Time Block Code (STBC) in K symbols (variables) is called g-group decodable STBC if its maximumlikelihood decoding metric can be written as a sum of g terms such that each ...
Sanjay Karmakar, B. Sundar Rajan