3120 search results - page 23 / 624 » An optimal architecture for a DDC |
DAC
1994
ACM
14 years 14 days ago
1994
ACM
This paper introduces hot potato high level synthesis transformation techniques. These techniques add deflection operations in a computation in such a way that a specific goal is ...
WSCG
2004
13 years 9 months ago
2004
An ongoing research topic is to build suitable visualization architectures for anthropomorphic conversational user interfaces which will run on different devices like laptops, PDA...
DAC
1994
ACM
14 years 14 days ago
1994
ACM
An e cient solution to the wire sizing problem WSP usingthe Elmoredelaymodelisproposed. Two formulations of the problem are put forth: in the rst, the minimum interconnect delay i...
FCCM
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper investigates the impact of the local and global register file architecture on a reconfigurable system based on the ADRES architecture [3]. The register files consume a s...
ICS
1993
Tsinghua U.
14 years 14 days ago
1993
Tsinghua U.
This paper examines the effectiveness of decoupling as an optimization technique for high-performance computer architectures. Decoupled access execute architectures are described,...