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» An optimal architecture for a DDC
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PEWASUN
2006
ACM
14 years 1 months ago
Experimental analysis of a transport protocol for ad hoc networks (TPA)
Many previous papers have pointed out that TCP performance in multi-hop ad hoc networks is not optimal. This is due to several TCP design principles that reflect the characteristi...
Giuseppe Anastasi, Emilio Ancillotti, Marco Conti,...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
FCCM
2005
IEEE
139views VLSI» more  FCCM 2005»
14 years 1 months ago
A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation
Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures. We previously in...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
HPDC
2005
IEEE
14 years 1 months ago
Genetic algorithm based automatic data partitioning scheme for HPF
good data partitioning scheme is the need of the time. However it is very diflcult to arrive at a good solution as the number of possible dutupartitionsfor a given real lifeprogra...
Sunil Kumar Anand, Y. N. Srikant
ICPADS
2005
IEEE
14 years 1 months ago
A Model for Distributing and Querying a Data Warehouse on a Computing Grid
Data warehouses store large volumes of data according to a multidimensional model with dimensions representing different axes of analysis. OLAP systems (OnLine Analytical Processi...
Pascal Wehrle, Maryvonne Miquel, Anne Tchounikine