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ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 1 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
TCC
2010
Springer
188views Cryptology» more  TCC 2010»
15 years 11 months ago
Founding Cryptography on Tamper-Proof Hardware Tokens
A number of works have investigated using tamper-proof hardware tokens as tools to achieve a variety of cryptographic tasks. In particular, Goldreich and Ostrovsky considered the ...
Vipul Goyal, Yuval Ishai, Amit Sahai, Ramarathnam ...
ISPASS
2010
IEEE
15 years 11 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
DSD
2009
IEEE
84views Hardware» more  DSD 2009»
15 years 11 months ago
Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...
133
Voted
FOCS
2009
IEEE
15 years 11 months ago
Instance-Optimal Geometric Algorithms
We prove the existence of an algorithm A for computing 2-d or 3-d convex hulls that is optimal for every point set in the following sense: for every set S of n points and for ever...
Peyman Afshani, Jérémy Barbay, Timot...
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