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ICONIP
2008
13 years 9 months ago
Noise-Tolerant Analog Circuits for Sensory Segmentation Based on Symmetric STDP Learning
Abstract. We previously proposed a neural segmentation model suitable for implementation with complementary metal-oxide-semiconductor (CMOS) circuits. The model consists of neural ...
Gessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemi...
NIPS
2004
13 years 9 months ago
Edge of Chaos Computation in Mixed-Mode VLSI - A Hard Liquid
Computation without stable states is a computing paradigm different from Turing's and has been demonstrated for various types of simulated neural networks. This publication t...
Felix Schürmann, Karlheinz Meier, Johannes Sc...
FPL
2004
Springer
114views Hardware» more  FPL 2004»
14 years 1 months ago
Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA
Several implementations of Artificial Neural Networks have been reported in scientific papers. Nevertheless, these implementations do not allow the direct use of off-line trained n...
Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernan...
FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
14 years 1 days ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...
IJCNN
2008
IEEE
14 years 2 months ago
Wafer-scale integration of analog neural networks
Abstract— This paper introduces a novel design of an artificial neural network tailored for wafer-scale integration. The presented VLSI implementation includes continuous-time a...
Johannes Schemmel, Johannes Fieres, Karlheinz Meie...