We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Previous research demonstrated that Evolvable Hardware (EH) techniques can be employed to suppress Thermoacoustic (TA) instability in a computer simulated combustion chamber. Thou...
Saranyan Vigraham, John C. Gallagher, Sanjay K. Bo...
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...