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» Analog circuit simulation using range arithmetics
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VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 9 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
MSE
1999
IEEE
204views Hardware» more  MSE 1999»
14 years 1 months ago
A PC-based Educational Tool for CMOS Integrated Circuit Design
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...
Etienne Sicard, Chen Xi
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
14 years 3 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
GECCO
2005
Springer
156views Optimization» more  GECCO 2005»
14 years 2 months ago
Evolving analog controllers for correcting thermoacoustic instability in real hardware
Previous research demonstrated that Evolvable Hardware (EH) techniques can be employed to suppress Thermoacoustic (TA) instability in a computer simulated combustion chamber. Thou...
Saranyan Vigraham, John C. Gallagher, Sanjay K. Bo...
AHS
2006
IEEE
95views Hardware» more  AHS 2006»
14 years 17 days ago
A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...
Martin Trefzer, Jörg Langeheine, Karlheinz Me...