This paper studies multi-core clock distribution using active deskewing methods. We propose an efficient methodology that uses Verilog-A to model PLLs, clock trees and power suppl...
Petri net faulty models are useful for reliability analysis and fault diagnosis of discrete event systems. Such models are difficult to work out as long as they must be computed ac...
Edouard Leclercq, Souleiman Ould el Medhi, Dimitri...
Charmy is a framework for designing and validating architectural specifications. In the early stages of the software development process, the Charmy framework assists the software...
Paola Inverardi, Henry Muccini, Patrizio Pelliccio...
Message Sequence Charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimati...
Highly sensorised systems present two parallel challenges: how to design a sensor suite that can efficiently and cost-effectively support the needs of given services; and to extr...