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TC
2008
13 years 10 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ICRA
2002
IEEE
147views Robotics» more  ICRA 2002»
14 years 3 months ago
Design of Asymptotically Stable Walking for a 5-Link Planar Biped Walker via Optimization
— Closed-loop, asymptotically stable walking motions are designed for a 5-link, planar bipedal robot model with one degree of underactuation. Parameter optimization is applied to...
E. R. Westervelt, J. W. Grizzle
ISICT
2004
13 years 11 months ago
The design of the IPACS distributed software architecture
The IPACS-project (Integrated Performance Analysis of Computer Systems) was founded by the Federal Department of Education, Science, Research and Technology (BMBF) in the program ...
Heinz Kredel, Matthias Merz
ICIP
2005
IEEE
14 years 12 months ago
Feedback-based dynamic generalized LDA for face recognition
Linear Discriminant Analysis(LDA) is widely-used in face recognition systems. However, with the traditional formulation, the available information in the training samples is not su...
Dahua Lin, Shuicheng Yan, Xiaoou Tang
C3S2E
2009
ACM
14 years 2 months ago
A verification framework for access control in dynamic web applications
This paper proposes a security analysis framework for dynamic web applications. A reverse engineering process is performed over a dynamic web application to extract a rolebased ac...
Manar H. Alalfi, James R. Cordy, Thomas R. Dean