Sciweavers

562 search results - page 103 / 113
» Analysis of Hardware Acceleration in Reconfigurable Embedded...
Sort
View
CODES
2006
IEEE
14 years 1 months ago
Automatic run-time extraction of communication graphs from multithreaded applications
Embedded system synthesis, multiprocessor synthesis, and thread assignment policy design all require detailed knowledge of the runtime communication patterns among different threa...
Ai-Hsin Liu, Robert P. Dick
SAMOS
2007
Springer
14 years 1 months ago
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and
Abstract— This paper explores the resistance of MOS Current Mode Logic (MCML) against Differential Power Analysis (DPA) attacks. Circuits implemented in MCML, in fact, have uniqu...
Francesco Regazzoni, Stéphane Badel, Thomas...
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 4 months ago
SPM management using Markov chain based data access prediction
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
JUCS
2000
102views more  JUCS 2000»
13 years 7 months ago
Towards Two-Level Formal Modeling of Computer-Based Systems
: Embedded Computer-based Systems are becoming highly complex and hard to implement because of the large number of concerns the designers have to address. These systems are tightly...
Gabor Karsai, Greg Nordstrom, Ákos Lé...
DAC
2009
ACM
13 years 11 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen