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FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
14 years 1 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
TC
2010
13 years 2 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
FPL
2004
Springer
109views Hardware» more  FPL 2004»
14 years 1 months ago
Hardware Accelerated Novel Protein Identification
The proteins in living organisms perform almost every significant function that governs life. A protein's functionality depends upon its physical structure, which depends on i...
Anish Alex, Jonathan Rose, Ruth Isserlin-Weinberge...
CASES
2007
ACM
13 years 11 months ago
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
Chengmo Yang, Alex Orailoglu
CVIU
2010
267views more  CVIU 2010»
13 years 5 months ago
Accelerated hardware video object segmentation: From foreground detection to connected components labelling
This paper demonstrates the use of a single-chip FPGA for the segmentation of moving objects in a video sequence. The system maintains highly accurate background models, and integ...
Kofi Appiah, Andrew Hunter, Patrick Dickinson, Hon...