562 search results - page 80 / 113 » Analysis of Hardware Acceleration in Reconfigurable Embedded... |
DFT
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
FPL
2009
Springer
14 years 11 days ago
2009
Springer
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
ERSA
2006
13 years 9 months ago
2006
- In this paper, we present a prototype FPGA design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourie...