Sciweavers

562 search results - page 95 / 113
» Analysis of Hardware Acceleration in Reconfigurable Embedded...
Sort
View
CODES
2008
IEEE
14 years 2 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
ICCAD
2007
IEEE
88views Hardware» more  ICCAD 2007»
14 years 4 months ago
Extending systems-on-chip to the third dimension: performance, cost and technological tradeoffs
Abstract—Because of the today’s market demand for highperformance, high-density portable hand-held applications, electronic system design technology has shifted the focus from ...
Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa...
SIGMETRICS
2010
ACM
227views Hardware» more  SIGMETRICS 2010»
14 years 15 days ago
Characterizing and modeling user activity on smartphones: summary
In this paper, we present a comprehensive analysis of real smartphone usage during a 6-month study of real user activity on the Android G1 smartphone. Our goal is to study the hig...
Alex Shye, Benjamin Scholbrock, Gokhan Memik, Pete...
ASPLOS
2008
ACM
13 years 9 months ago
Adapting to intermittent faults in multicore systems
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
13 years 12 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey