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MICRO
1997
IEEE
86views Hardware» more  MICRO 1997»
15 years 7 months ago
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction
We revisit memory hierarchy design viewing memory as an inter-operation communication agent. This perspective leads to the development of novel methods of performing inter-operati...
Andreas Moshovos, Gurindar S. Sohi
ASPDAC
2006
ACM
158views Hardware» more  ASPDAC 2006»
15 years 9 months ago
Analysis of scratch-pad and data-cache performance using statistical methods
— An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or cache, is seen today as the key to obtaining energy and performance gains in data-do...
Javed Absar, Francky Catthoor
CODES
2006
IEEE
15 years 9 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
IPPS
1998
IEEE
15 years 7 months ago
High Performance Linear Algebra Package LAPACK90
Abstract. LAPACK90 is a set of LAPACK90 subroutines which interfaces FORTRAN90 with LAPACK. All LAPACK driver subroutines including expert drivers and some LAPACK computationals ha...
Jack Dongarra, Jerzy Wasniewski
IFIP
2010
Springer
15 years 7 months ago
Processing of Flow Accounting Data in Java: Framework Design and Performance Evaluation
Abstract Flow Accounting is a passive monitoring mechanism implemented in routers that gives insight into trac behavior and network characteristics. However, processing of Flow Ac...
Jochen Kögel, Sebastian Scholz