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IEEEPACT
2002
IEEE
15 years 7 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
126
Voted
HPDC
2008
IEEE
15 years 2 months ago
Eliminating the middleman: peer-to-peer dataflow
Efficiently executing large-scale, data-intensive workflows such as Montage must take into account the volume and pattern of communication. When orchestrating data-centric workflo...
Adam Barker, Jon B. Weissman, Jano I. van Hemert
IEEEPACT
2009
IEEE
15 years 9 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
ICS
2007
Tsinghua U.
15 years 8 months ago
Optimization and bottleneck analysis of network block I/O in commodity storage systems
Building commodity networked storage systems is an important architectural trend; Commodity servers hosting a moderate number of consumer-grade disks and interconnected with a hig...
Manolis Marazakis, Vassilis Papaefstathiou, Angelo...
EUROPAR
2004
Springer
15 years 7 months ago
SCISM vs IA-64 Tagging: Differences/Code Density Effects
In this paper we first present two tagging mechanisms; the SCISM and IA-64; thereafter we describe the mapping of IA-64 ISA to a SCISM configuration without changing or reassigni...
Georgi Gaydadjiev, Stamatis Vassiliadis