657 search results - page 105 / 132 » Analysis of Multithreaded Architectures for Parallel Computi... |
IEEEPACT
2002
IEEE
14 years 14 days ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
HPDC
2008
IEEE
13 years 7 months ago
2008
IEEE
Efficiently executing large-scale, data-intensive workflows such as Montage must take into account the volume and pattern of communication. When orchestrating data-centric workflo...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
ICS
2007
Tsinghua U.
14 years 1 months ago
2007
Tsinghua U.
Building commodity networked storage systems is an important architectural trend; Commodity servers hosting a moderate number of consumer-grade disks and interconnected with a hig...
EUROPAR
2004
Springer
14 years 28 days ago
2004
Springer
In this paper we first present two tagging mechanisms; the SCISM and IA-64; thereafter we describe the mapping of IA-64 ISA to a SCISM configuration without changing or reassigni...